In processing systems multiple components need to be synchronised for a variety of profiling and scheduling purposes. Likewise trace components that monitor the step by step activity of a processor need to have access to timing information that is consistent across the system so that ordering of detected events can be inferred.
These problems have been addressed with the use of timestamps. In processors designed by ARM® Ltd. of Cambridge UK the timestamp value used is a 64 bit value. Such a large value is selected to reduce the risk of it overflowing. This value needs to be available at different points in the system, and distributing a 64-bit value around a system is expensive in routing and challenging in implementation. As this value is used to indicate a time, the local copies of the value should be consistent with each other and thus, their delay in transmission should be similar. Additional problems arise in systems that have multiple clock and power domains. Transmitting an incrementing signal such as a timestamp signal across a clock domain boundary raises its own problems and while this can in theory be done using Gray codes, the resultant timestamp cannot be passed over a second clock domain boundary in the same way.
It would be desirable to be able to provide a system that could pass such an incrementing count value without such large routing overheads and with the ability to cross clock domain boundaries.